In the last years the memory market has been characterized by an increasing interest in high density devices and technology scaling has become more and more aggressive, both for memory core and circuitry, especially for the flash memory devices. While the technology is continuously improving to reduce the memory size, new solutions are studied to reduce the area of the related analog circuitry, which is not exclusively dependent on technology, but mainly on the specifically adopted layouts and architectures.
Redundancy and configuration information is extremely important for the correct working of a flash memory device. Both redundancy and configuration information are stored into the memory device during the test process of the flash memory device, prior to selling the device to an end user. Redundancy information does not need to be updated after it is stored at the end of the manufacturing process of the flash memory device, while configuration information needs to be updated into new data.
More in particular, redundancy information is used by the circuitry of the device to repair internal array defectiveness. For example, redundancy information is essentially composed by the addresses of the failed strings which are to be substituted by other strings that have been added to the matrix for this purpose.
Configuration information is used by the circuitry to define the value of important parameters used for the correct working of the circuitry itself. For example, configuration information relates to all circuit portions, both the analog portion and the digital portion, the current and voltage references, the power-on circuitry, all the regulators, the output values from the pumps, the clock frequencies of the oscillator, the inner algorithms, the output buffers and additional branches that can be connected or not to the configurations. Generally, during the design phase, it is usual to configure the circuits assuming it can happen that the silicon would function in a different way with respect to the behavior having been simulated by using reference models.
Next, a conventional way to store such information in flash memory devices is to use particular structures called “fuses”. The information is written into the fuses by means of high currents that destroy the structure of the fuses themselves. A destroyed fuse conventionally corresponds to a logical “1”, while a non-destroyed fuse conventionally corresponds to a logical “0”. The fuse structures may store both the redundancy and configuration information.
However, in the convention way, the disadvantage in using fuses is that fuses are big structures and so a huge area is concerned. Moreover, the fuse needs to be destroyed when information is written therein, and the destroyed fuses cannot be repaired, therefore, once the information is stored in the fuse, it cannot be changed anymore.
Another conventional way to store redundancy and configuration information is to use memory cells in the array of the flash memory device. The cells share the sensing circuit with the other cells of the array. This way is more efficient in terms of area occupation than the above-mentioned convention way, and allows also changing the stored information by means of an erase operation.
However, in another conventional way, provided that the redundancy information is stored in the array of the flash memory device, until the array is accessed for read, such a redundancy information is thus not available. As a consequence, the reading of the redundancy information is obviously performed without knowing the redundancy information or adopting redundant technique. Therefore, such a read operation is difficult or could not be performed without an error. In this case, complex error correction algorithms have to be used, which made the read operation more complicated.
Another problem of this conventional way is that after the read operation the information has to be stored in an array of latches. This is because the redundancy and configuration information has to be ready for all the subsequent operations, and also because the sensing circuitry, that is shared with the memory array, should be kept free to read data from the memory array.
Still another problem of this conventional way, redundancy and configuration information has a different characteristic, that is, the redundancy information is not erased but only read, once after written in the flash memory, while the configuration information may be changed. Provided that the redundancy and configuration information are stored in a common erasing area such as block or sector of the flash memory device, the redundancy information is erased unnecessarily when the configuration information is erased.
With regard to reading correctly information such as redundant and configuration without an error, since the redundancy and configuration information need to be ready at the end of the power on phase of the flash memory device, the read operations for the redundancy and configuration information need to be performed before the end of the power-on phase. In this power-on phase of the device, if the voltage supply is not well controlled, the information is not correctly read out from the array. In general, since voltage supply to be used during the power-on phase in the device is ramping up, the read operation during this phase is difficult to be controlled well, therefore information is difficult to be read correctly without an error during this phase. Furthermore, the voltage ramp during the power-on phase depends on the device in which the flash memory device is used. For example, the device could be a USB portable storage device, a cellular phone, an electronic board, and the like. In each of such devices, the speed sloping, the presence or absence of glitches, the final value, the presence or not of intermediate plateau, and the like are different. This also makes the difficulty to control the voltage ramp well and to read information correctly without an error during the phase.